pub const FLASHMEM_BASE: usize = 0x00000000; // FLASHMEM
pub const BROM_BASE: usize = 0x10000000; // BROM
pub const GPRAM_BASE: usize = 0x11000000; // GPRAM
pub const SRAM_BASE: usize = 0x20000000; // SRAM
pub const RFC_RAM_BASE: usize = 0x21000000; // RFC_RAM
pub const RFC_ULLRAM_BASE: usize = 0x21004000; // RFC_ULLRAM
pub const SSI0_BASE: usize = 0x40000000; // SSI
pub const UART0_BASE: usize = 0x40001000; // UART
pub const I2C0_BASE: usize = 0x40002000; // I2C
pub const SSI1_BASE: usize = 0x40008000; // SSI
pub const UART1_BASE: usize = 0x4000B000; // UART
pub const GPT0_BASE: usize = 0x40010000; // GPT
pub const GPT1_BASE: usize = 0x40011000; // GPT
pub const GPT2_BASE: usize = 0x40012000; // GPT
pub const GPT3_BASE: usize = 0x40013000; // GPT
pub const UDMA0_BASE: usize = 0x40020000; // UDMA
pub const I2S0_BASE: usize = 0x40021000; // I2S
pub const GPIO_BASE: usize = 0x40022000; // GPIO
pub const CRYPTO_BASE: usize = 0x40024000; // CRYPTO
pub const PKA_BASE: usize = 0x40025000; // PKA
pub const PKA_RAM_BASE: usize = 0x40026000; // PKA_RAM
pub const PKA_INT_BASE: usize = 0x40027000; // PKA_INT
pub const TRNG_BASE: usize = 0x40028000; // TRNG
pub const FLASH_BASE: usize = 0x40030000; // FLASH
pub const VIMS_BASE: usize = 0x40034000; // VIMS
pub const SRAM_MMR_BASE: usize = 0x40035000; // SRAM_MMR
pub const RFC_PWR_BASE: usize = 0x40040000; // RFC_PWR
pub const RFC_DBELL_BASE: usize = 0x40041000; // RFC_DBELL
pub const RFC_RAT_BASE: usize = 0x40043000; // RFC_RAT
pub const RFC_FSCA_BASE: usize = 0x40044000; // RFC_FSCA
pub const WDT_BASE: usize = 0x40080000; // WDT
pub const IOC_BASE: usize = 0x40081000; // IOC
pub const PRCM_BASE: usize = 0x40082000; // PRCM
pub const EVENT_BASE: usize = 0x40083000; // EVENT
pub const SMPH_BASE: usize = 0x40084000; // SMPH
pub const ADI2_BASE: usize = 0x40086000; // ADI
pub const ADI3_BASE: usize = 0x40086200; // ADI
pub const AON_PMCTL_BASE: usize = 0x40090000; // AON_PMCTL
pub const AON_RTC_BASE: usize = 0x40092000; // AON_RTC
pub const AON_EVENT_BASE: usize = 0x40093000; // AON_EVENT
pub const AON_IOC_BASE: usize = 0x40094000; // AON_IOC
pub const AON_BATMON_BASE: usize = 0x40095000; // AON_BATMON
pub const AUX_SPIM_BASE: usize = 0x400C1000; // AUX_SPIM
pub const AUX_MAC_BASE: usize = 0x400C2000; // AUX_MAC
pub const AUX_TIMER2_BASE: usize = 0x400C3000; // AUX_TIMER2
pub const AUX_TDC_BASE: usize = 0x400C4000; // AUX_TDC
pub const AUX_EVCTL_BASE: usize = 0x400C5000; // AUX_EVCTL
pub const AUX_SYSIF_BASE: usize = 0x400C6000; // AUX_SYSIF
pub const AUX_TIMER01_BASE: usize = 0x400C7000; // AUX_TIMER01
pub const AUX_SMPH_BASE: usize = 0x400C8000; // AUX_SMPH
pub const AUX_ANAIF_BASE: usize = 0x400C9000; // AUX_ANAIF
pub const AUX_DDI0_OSC_BASE: usize = 0x400CA000; // DDI
pub const AUX_ADI4_BASE: usize = 0x400CB000; // ADI
pub const AUX_AIODIO0_BASE: usize = 0x400CC000; // AUX_AIODIO
pub const AUX_AIODIO1_BASE: usize = 0x400CD000; // AUX_AIODIO
pub const AUX_AIODIO2_BASE: usize = 0x400CE000; // AUX_AIODIO
pub const AUX_AIODIO3_BASE: usize = 0x400CF000; // AUX_AIODIO
pub const AUX_RAM_BASE: usize = 0x400E0000; // AUX_RAM
pub const AUX_SCE_BASE: usize = 0x400E1000; // AUX_SCE
pub const FLASH_CFG_BASE: usize = 0x50000000; // CC26_DUMMY_COMP
pub const FCFG1_BASE: usize = 0x50001000; // FCFG1
pub const FCFG2_BASE: usize = 0x50002000; // FCFG2
pub const CCFG_BASE: usize = 0x50003000; // CCFG
pub const SSI0_NONBUF_BASE: usize = 0x60000000; // SSI CPU nonbuf base
pub const UART0_NONBUF_BASE: usize = 0x60001000; // UART CPU nonbuf base
pub const I2C0_NONBUF_BASE: usize = 0x60002000; // I2C CPU nonbuf base
pub const SSI1_NONBUF_BASE: usize = 0x60008000; // SSI CPU nonbuf base
pub const UART1_NONBUF_BASE: usize = 0x6000B000; // UART CPU nonbuf base
pub const GPT0_NONBUF_BASE: usize = 0x60010000; // GPT CPU nonbuf base
pub const GPT1_NONBUF_BASE: usize = 0x60011000; // GPT CPU nonbuf base
pub const GPT2_NONBUF_BASE: usize = 0x60012000; // GPT CPU nonbuf base
pub const GPT3_NONBUF_BASE: usize = 0x60013000; // GPT CPU nonbuf base
pub const UDMA0_NONBUF_BASE: usize = 0x60020000; // UDMA CPU nonbuf base
pub const I2S0_NONBUF_BASE: usize = 0x60021000; // I2S CPU nonbuf base
pub const GPIO_NONBUF_BASE: usize = 0x60022000; // GPIO CPU nonbuf base
pub const CRYPTO_NONBUF_BASE: usize = 0x60024000; // CRYPTO CPU nonbuf base
pub const PKA_NONBUF_BASE: usize = 0x60025000; // PKA CPU nonbuf base
pub const PKA_RAM_NONBUF_BASE: usize = 0x60026000; // PKA_RAM CPU nonbuf base
pub const PKA_INT_NONBUF_BASE: usize = 0x60027000; // PKA_INT CPU nonbuf base
pub const TRNG_NONBUF_BASE: usize = 0x60028000; // TRNG CPU nonbuf base
pub const FLASH_NONBUF_BASE: usize = 0x60030000; // FLASH CPU nonbuf base
pub const VIMS_NONBUF_BASE: usize = 0x60034000; // VIMS CPU nonbuf base
pub const SRAM_MMR_NONBUF_BASE: usize = 0x60035000; // SRAM_MMR CPU nonbuf base
pub const RFC_PWR_NONBUF_BASE: usize = 0x60040000; // RFC_PWR CPU nonbuf base
pub const RFC_DBELL_NONBUF_BASE: usize = 0x60041000; // RFC_DBELL CPU nonbuf base
pub const RFC_RAT_NONBUF_BASE: usize = 0x60043000; // RFC_RAT CPU nonbuf base
pub const RFC_FSCA_NONBUF_BASE: usize = 0x60044000; // RFC_FSCA CPU nonbuf base
pub const WDT_NONBUF_BASE: usize = 0x60080000; // WDT CPU nonbuf base
pub const IOC_NONBUF_BASE: usize = 0x60081000; // IOC CPU nonbuf base
pub const PRCM_NONBUF_BASE: usize = 0x60082000; // PRCM CPU nonbuf base
pub const EVENT_NONBUF_BASE: usize = 0x60083000; // EVENT CPU nonbuf base
pub const SMPH_NONBUF_BASE: usize = 0x60084000; // SMPH CPU nonbuf base
pub const ADI2_NONBUF_BASE: usize = 0x60086000; // ADI CPU nonbuf base
pub const ADI3_NONBUF_BASE: usize = 0x60086200; // ADI CPU nonbuf base
pub const AON_PMCTL_NONBUF_BASE: usize = 0x60090000; // AON_PMCTL CPU nonbuf base
pub const AON_RTC_NONBUF_BASE: usize = 0x60092000; // AON_RTC CPU nonbuf base
pub const AON_EVENT_NONBUF_BASE: usize = 0x60093000; // AON_EVENT CPU nonbuf base
pub const AON_IOC_NONBUF_BASE: usize = 0x60094000; // AON_IOC CPU nonbuf base
pub const AON_BATMON_NONBUF_BASE: usize = 0x60095000; // AON_BATMON CPU nonbuf base
pub const AUX_SPIM_NONBUF_BASE: usize = 0x600C1000; // AUX_SPIM CPU nonbuf base
pub const AUX_MAC_NONBUF_BASE: usize = 0x600C2000; // AUX_MAC CPU nonbuf base
pub const AUX_TIMER2_NONBUF_BASE: usize = 0x600C3000; // AUX_TIMER2 CPU nonbuf base
pub const AUX_TDC_NONBUF_BASE: usize = 0x600C4000; // AUX_TDC CPU nonbuf base
pub const AUX_EVCTL_NONBUF_BASE: usize = 0x600C5000; // AUX_EVCTL CPU nonbuf base
pub const AUX_SYSIF_NONBUF_BASE: usize = 0x600C6000; // AUX_SYSIF CPU nonbuf base
pub const AUX_TIMER01_NONBUF_BASE: usize = 0x600C7000; // AUX_TIMER01 CPU nonbuf base
pub const AUX_SMPH_NONBUF_BASE: usize = 0x600C8000; // AUX_SMPH CPU nonbuf base
pub const AUX_ANAIF_NONBUF_BASE: usize = 0x600C9000; // AUX_ANAIF CPU nonbuf base
pub const AUX_DDI0_OSC_NONBUF_BASE: usize = 0x600CA000; // DDI CPU nonbuf base
pub const AUX_ADI4_NONBUF_BASE: usize = 0x600CB000; // ADI CPU nonbuf base
pub const AUX_AIODIO0_NONBUF_BASE: usize = 0x600CC000; // AUX_AIODIO CPU nonbuf base
pub const AUX_AIODIO1_NONBUF_BASE: usize = 0x600CD000; // AUX_AIODIO CPU nonbuf base
pub const AUX_AIODIO2_NONBUF_BASE: usize = 0x600CE000; // AUX_AIODIO CPU nonbuf base
pub const AUX_AIODIO3_NONBUF_BASE: usize = 0x600CF000; // AUX_AIODIO CPU nonbuf base
pub const AUX_RAM_NONBUF_BASE: usize = 0x600E0000; // AUX_RAM CPU nonbuf base
pub const AUX_SCE_NONBUF_BASE: usize = 0x600E1000; // AUX_SCE CPU nonbuf base
pub const FLASHMEM_ALIAS_BASE: usize = 0xA0000000; // FLASHMEM Alias base
pub const CPU_ITM_BASE: usize = 0xE0000000; // CPU_ITM
pub const CPU_DWT_BASE: usize = 0xE0001000; // CPU_DWT
pub const CPU_FPB_BASE: usize = 0xE0002000; // CPU_FPB
pub const CPU_SCS_BASE: usize = 0xE000E000; // CPU_SCS
pub const CPU_TPIU_BASE: usize = 0xE0040000; // CPU_TPIU
pub const CPU_TIPROP_BASE: usize = 0xE00FE000; // CPU_TIPROP
pub const CPU_ROM_TABLE_BASE: usize = 0xE00FF000; // CPU_ROM_TABLE
